Up to now, a motor control unit having a power relay, which interrupts or permits a power to be fed from a power supply to a motor, formed with semiconductor switching elements such as field-effect transistors (FETs) has been known. In the motor control unit described in the patent document 1 (i.e., JP-A-2010-74915), the power relay is formed by connecting two switching, elements in series with each other so that the polarities of parasitic diodes thereof are oriented mutually reversely. The motor control unit includes a drive circuit that is interposed between the power relay and motor and feeds a driving power to the motor, and two voltage sensors of a first voltage sensor and a second voltage sensor. The first voltage sensor detects a voltage on an output side of a first FET that is the switching element on the side of the power supply out of the two switching elements constituting the power relay. The second voltage sensor detects a voltage on an output side of a second FET that is the switching element on the drive circuit side of the first FET. In initial check to be performed before control of drive of the motor is begun, the first FET and second FET are controlled to be on or off. Based on voltages detected at this time by the first voltage sensor and second voltage sensor respectively, a short-circuit fault or disconnection fault in each of the first FET and second FET is detected.
In the motor control unit described in the patent document 1, the two voltage sensors are, as mentioned above, needed as physical components in order to detect the short-circuit fault or disconnection fault in each of the first FET and second FET. As processing components, a maximum of four steps has to be executed. Therefore, there is a fear that as a configuration may become more complex and the time required for detection of the fault may increase.
In addition, in the configuration of the motor control unit in the patent document 1, for detecting the short-circuit fault or disconnection fault of the second FET, it is necessary to preliminarily charge a capacitor interposed between the second FET and drive circuit. Therefore, unless a step (second step) of charging the capacitor by controlling the first FET to turn it on is completed, a step of detecting the short-circuit fault or disconnection fault of the second FET cannot be executed.